Embedded Systems

Bop-It Inspired Embedded System

Bop-It Inspired System (Arduino)

Self-guided FreeRTOS-based project.
GitHub | Functional Teg-It Video

Power Rail Firmware for Robotics Team

Power Rail Firmware - Robotics Team

Created firmware for efficient power management.
GitHub

Hyperloop Testing Procedures

Hyperloop - Testing Procedures (Python)

Researched and developed testing procedures. Focused on safety, repeatability, and efficiency.

Accelerators / Computer Architecture

Self-Attention Block Accelerator

Self-Attention Block Accelerator (SystemVerilog)

Quartus Version | Verilator Version

Conway's Game of Life Accelerator

Conway's Game of Life Accelerator (SystemVerilog)

Explored PPA trade-offs. Discussed accelerator workflow using trace file verification. GIFs available.

Pipelined CPU Design Model Simulation

Pipelined CPU (SystemVerilog)

Implemented 5-stage pipelined CPU.
GitHub

Programming Tools and Concepts

Dijkstra's SeamFinder & Deques in Java

Dijkstra's SeamFinder & Deques (Java)

Learned advanced data structures.
GitHub

T9 Implementation in C

T9 Implementation (C)

Built a predictive text system.
GitHub

Databases: Vaccine Scheduler Schema

Vaccine Scheduler (Java + SQLite)

Full-stack scheduler using Java + SQLite.
GitHub | Vaccine Scheduler Video

Computer Networking / Cryptography

TCP Server with Multi-Threading

TCP Server with Multi-Threading (Python)

Thread-safe implementation.
GitHub | Server Client Functionality in a Terminal

RFID Attacks

RFID Attacks (Python)

Security-focused project using Python.
GitHub

Machine Learning

Visual Odometry for Coastal ROV

Visual Odometry for Coastal ROV

Capstone with BASALT.
MAVLink | Basalt Adaptation
Basalt Video | Final Demo Video | Underwater Test Video

Multi-Object Tracking

Multi-Object Tracking (Python)

Built IoU-based tracker and post-processing pipeline using k-means. Includes detection, tracklet clustering, and final visualization.
Detection and Classification Video

Peripheral DE1_SoC Work & Robotics

FPGA Audio Visualizer

Audio Visualizer (SystemVerilog)

Built a VGA-based audio visualizer with DE1_SoC + Audio Codec.
GitHub